A blockbuster news from Morgan Stanley shook the global semiconductor circle: TSMC may increase its 3nm wafer production capacity by an additional 20,000 pieces per month on the basis of the original plan! This means that the total production capacity of 3nm will jump from 14–150,000 pieces/month to 16–170,000 pieces/month in 2026.

This expansion follows Nvidia CEO Jensen Huang's recent high-profile visit to TSMC. Huang publicly stated at the time that Nvidia's business was "very strong" and had directly requested TSMC to provide more chip supply.

If the expansion is implemented, TSMC will need to invest $5 billion to $7 billion in additional capital expenditures for this purpose, increasing its total capital expenditure in 2026 from the current estimate of about $43 billion to $48 billion to $50 billion. The market believes that this will significantly benefit global semiconductor equipment manufacturers.

More importantly, this move sends a key signal: the demand for AI chips is still hot, and the current supply chain bottleneck has shifted from front-end manufacturing to more upstream - especially wafer capacity and key materials.

|3nm production capacity is urgent, TSMC may vacate the old production line to expand production

As major AI chip customers such as Nvidia, AMD, and Alchip compete to place orders, TSMC's 3nm advanced process production capacity is becoming more and more tight.

In the past, TSMC has been cautious about expanding production, hoping to keep the advanced process "running at full load". But in the face of strong demand from core customers such as Nvidia, the company seems to have changed its strategy.

The problem is: TSMC's new cleanroom space in Taiwan has been reserved for the next generation of 2nm chips, and there is no extra place to build a new 3nm production line.

What to do? Morgan Stanley's latest investigation shows that TSMC may have taken a clever approach: remove the old 22/28nm equipment from the Fab 15 fab to free up valuable cleanroom space for the installation of a new 3nm production line. These old devices may be shipped to TSMC's European factories under construction in the future for continued use.

In this way, TSMC is expected to increase its monthly production capacity of 3nm from the originally expected 14–150,000 units to 16–170,000 pieces in 2026 without building new factories. In order to meet the hot demand for AI chips, TSMC is "tearing down the east wall to make up for the west wall" and using the space of the old production line to make way for the most profitable 3nm.

Capital expenditure may increase significantly, and semiconductor equipment manufacturers are welcome

Expanding 3nm production capacity requires huge investment. Morgan Stanley analyst Charlie Chan estimates that every additional 1,000 pieces/month of 3nm production capacity will cost about $300 million; The plan to add 20,000 tablets per month means an additional investment of $5 billion to $7 billion. As a result, TSMC's total capital expenditure in 2026 may be raised from about $43 billion to $48 billion to $50 billion.

This is a clear positive signal for the global semiconductor equipment industry.

The report pointed out that TSMC has always been the "weather vane" of the industry - once it significantly increases investment, it means that it is very confident in future chip demand, and upstream equipment suppliers (such as etching machines, lithography, and testing equipment manufacturers) will directly benefit.

Based on this, Morgan Stanley reiterated its "overweight" rating on industrial chain companies such as TSMC, Jingyuan Electronics, and ASE.

TSMC dares to spend money, and the equipment factory has an order; The prosperity of the industry, just look at how much it spends.

| CoWoS is no longer a bottleneck, the real stuck point is in wafer manufacturing

In the past, many people believed that the biggest obstacle to the supply of AI chips was CoWoS advanced packaging technology. But the latest report points out that this bottleneck may be over.

The analysis shows that although technology giants are building power-hungry data centers on a large scale, after converting these demands into actual consumption of CoWoS, TSMC and other manufacturers have basically enough packaging capacity.

What is really in short supply is front-end wafer manufacturing capabilities and key materials such as ABF substrates and T-Glass (glass substrates).

This judgment has also been confirmed by the industrial chain. According to Reuters, ASIC design company Alchip made it clear that 3nm wafers are "hard to find". This means that even if the packaging capacity is sufficient and there are not enough wafers, AI chips will still not be able to be made.

The core reason why TSMC is considering emergency production expansion is that the demand for computing power from AI giants such as Nvidia cannot stop at all.

When Huang Renxun visited Taiwan, he bluntly said: "Without TSMC, there would be no NVIDIA today", which clearly illustrates his extreme dependence on TSMC's production capacity. From Tesla's self-developed 3nm AI chip (AI5) to cloud service providers continuing to increase AI servers, all signs indicate that the demand for state-of-the-art process chips will only get stronger and stronger in the next few years.

Jingtai view: TSMC is not only vacating clean room space today, but also a "strategic highland" for AI computing power in the next three years. This competition is no longer "who designs better", but - whoever gets the wafer first can train larger models, deploy faster services, and seize more market share.

For investors, every increase in TSMC's CapEx is the clearest clarion call for the semiconductor cycle. The wind rises between the wafers, and the waves rise at the top of AI. This time, don't just stare at the chip design company, but see that the real moat is hidden in the silicon wafer the size of a fingernail cap.